1. Field of the Invention
The present invention relate to a semiconductor device and to a method of manufacturing a semiconductor device. More particularly, the present invention relates to a semiconductor device including a single-crystalline structure and to a method of manufacturing a semiconductor device using an epitaxial growth process.
2. Description of the Related Art
In general, semiconductor material or the like may exist in a single-crystalline state, a polycrystalline state or an amorphous state. Atoms of a material in a single-crystalline state are arranged uniformly so that the material does not have any discontinuities. Atoms of a material in a polycrystalline state are arranged uniformly in only some of the material. Atoms of a material in an amorphous state have an irregular arrangement.
In addition, material in a polycrystalline state has grain boundaries that provide discontinuities through which a carrier, such as an electron, has difficulty moving. On the other hand, material in a single-crystalline state has hardly any grain boundaries so that a carrier, such as an electron, moves easily in single-crystalline materials. Thus, material in a single-crystalline state has relatively superior electrical characteristics compared to material in a polycrystalline state.
Accordingly, single-crystalline material is widely utilized to form the channel layer of a semiconductor device, such as a thin film transistor or a system-on-chip. For example, the single-crystalline material may be single-crystalline silicon. A structure of such single-crystalline material may be formed by a selective epitaxial growth (SEG) process or an epitaxial lateral overgrowth (ELO) process. A conventional method of forming a single-crystalline structure using a SEG process or an ELO process is disclosed in U.S. Pat. No. 6,562,707 issued to Ryu et al.
According to the conventional method, an insulation layer pattern is formed on a silicon substrate. The insulation layer pattern has openings exposing portions of the silicon substrate. The exposed portions of the silicon substrate are used as seeds. The seeds are exposed to a source gas so that layers of single-crystalline silicon are epitaxially grown on the seeds. The layers of single-crystalline silicon are epitaxially grown until they are connected to each other and thereby form a single-crystalline structure.
However, upper portions of the epitaxial layers initially connect to each other while the layers are epitaxially grown. Once the upper portions of the epitaxial layers are connected to each other, the source gas may not penetrate to the insulation layer pattern. In this case, voids may be formed between the insulation layer and the single crystalline structure.
FIG. 1 is a cross-sectional view of a conventional semiconductor device including a single-crystalline structure having a void “1”. Referring to FIG. 1, epitaxial layers 14 are formed on a semiconductor substrate 10 and an insulation layer pattern 12. The upper portions of the epitaxial layers are connected to each other. As was explained above, the void “I “ is formed because the upper portions of the epitaxial layers prevented the source gas from penetrating to the insulation layer pattern 12 during the epitaxial growth process.
In the case in which such a single-crystalline structure is used as a channel layer of a semiconductor device, the void degrades the electrical characteristics of the semiconductor device.